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Searched refs:STARTEN1_SET (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c365 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
412 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterFbb()
458 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterNbb()
1166 SYSCTL0->STARTEN1_SET = 1UL << (intNumber - 32U); in EnableDeepSleepIRQ()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c365 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterRbb()
412 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterFbb()
458 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMC_PMIC_IRQn - 32U); in POWER_EnterNbb()
1166 SYSCTL0->STARTEN1_SET = 1UL << (intNumber - 32U); in EnableDeepSleepIRQ()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
436 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
483 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
1315 SYSCTL0->STARTEN1_SET = 1UL << (intNumber - 32U); in EnableDeepSleepIRQ()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
436 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
483 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
1315 SYSCTL0->STARTEN1_SET = 1UL << (intNumber - 32U); in EnableDeepSleepIRQ()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c388 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
436 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
483 SYSCTL0->STARTEN1_SET = 1UL << ((uint32_t)PMU_PMIC_IRQn - 32U); in AT_QUICKACCESS_SECTION_CODE()
1315 SYSCTL0->STARTEN1_SET = 1UL << (intNumber - 32U); in EnableDeepSleepIRQ()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h21102 __O uint32_t STARTEN1_SET; /**< Start enable 1 set, offset: 0x6A4 */ member
DMIMXRT685S_cm33.h30715 __O uint32_t STARTEN1_SET; /**< Start enable 1 set, offset: 0x6A4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h30715 __O uint32_t STARTEN1_SET; /**< Start enable 1 set, offset: 0x6A4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h34046 __IO uint32_t STARTEN1_SET; /**< Start Enable 1 Set, offset: 0x6A4 */ member
DMIMXRT595S_cm33.h43845 __IO uint32_t STARTEN1_SET; /**< Start Enable 1 Set, offset: 0x6A4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h42218 __IO uint32_t STARTEN1_SET; /**< Start Enable 1 Set, offset: 0x6A4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h43844 __IO uint32_t STARTEN1_SET; /**< Start Enable 1 Set, offset: 0x6A4 */ member