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Searched refs:SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h72657 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
72663 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
DMIMXRT1175_cm7.h71755 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
71761 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h71253 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
71259 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
DMIMXRT1165_cm4.h72155 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
72161 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h71755 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
71761 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h77618 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
77624 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
DMIMXRT1166_cm7.h76716 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
76722 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h78117 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
78123 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
DMIMXRT1173_cm7.h77215 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
77221 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h77218 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
77224 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h87885 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
87891 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)
DMIMXRT1176_cm4.h88787 #define SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK (0x80U) macro
88793 …t32_t)(((uint32_t)(x)) << SRC_DOMAIN_USBPHY2_CPU1_SUSP_SHIFT)) & SRC_DOMAIN_USBPHY2_CPU1_SUSP_MASK)