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Searched refs:SRAMCR2 (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/semc/
Dfsl_semc.c1063 base->SRAMCR2 = timing; in SEMC_ConfigureSRAMWithChipSelection()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h33235 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h33256 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h34819 __IO uint32_t SRAMCR2; /**< SRAM control register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h36036 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h39085 __IO uint32_t SRAMCR2; /**< SRAM control register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h39446 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h36920 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h41121 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h41114 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h64964 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1175_cm7.h64062 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h63560 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1165_cm4.h64462 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h64062 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h69925 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1166_cm7.h69023 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h70424 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1173_cm7.h69522 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h69525 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h80192 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1176_cm4.h81094 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h73950 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm33.h77798 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member
DMIMXRT1189_cm7.h75753 __IO uint32_t SRAMCR2; /**< SRAM Control Register 2, offset: 0x78 */ member

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