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Searched refs:SPI_RSER_TCF_RE_MASK (Results 1 – 25 of 37) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/dspi/
Dfsl_dspi.h67 … kDSPI_TxCompleteInterruptEnable = (int)SPI_RSER_TCF_RE_MASK, /*!< TCF interrupt enable.*/
75 kDSPI_AllInterruptEnable = (int)(SPI_RSER_TCF_RE_MASK | SPI_RSER_EOQF_RE_MASK |
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SPI.h509 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
512 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/s32/drivers/s32ze/Spi/src/
DSpi_Ip.c2229 … IrqFlags &= Base->RSER & (SPI_RSER_TCF_RE_MASK | SPI_RSER_RFOF_RE_MASK | SPI_RSER_TFUF_RE_MASK); in Spi_Ip_IrqHandler()
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h2876 #define SPI_RSER_TCF_RE_MASK DSPI_RSER_TCF_RE_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h9454 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
9460 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h9487 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
9493 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h9390 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
9396 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h10273 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
10279 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h10426 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
10432 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h11214 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
11220 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h11344 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
11350 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h11732 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
11738 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h11539 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
11545 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h7059 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
7061 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h7059 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
7061 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h12659 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
12665 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h13057 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
13063 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h17326 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
17332 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h21021 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
21027 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h6881 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
6883 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h7626 #define SPI_RSER_TCF_RE_MASK 0x80000000u macro
7629 …) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TCF_RE_SHIFT))&SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h6810 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
6812 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h7626 #define SPI_RSER_TCF_RE_MASK 0x80000000u macro
7629 …) (((uint32_t)(((uint32_t)(x))<<SPI_RSER_TCF_RE_SHIFT))&SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h22878 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
22884 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h22832 #define SPI_RSER_TCF_RE_MASK (0x80000000U) macro
22838 … (((uint32_t)(((uint32_t)(x)) << SPI_RSER_TCF_RE_SHIFT)) & SPI_RSER_TCF_RE_MASK)

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