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Searched refs:SPC_LP_CFG_LP_IREFEN_MASK (Results 1 – 25 of 26) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/spc/
Dfsl_spc.h861 base->LP_CFG |= SPC_LP_CFG_LP_IREFEN_MASK; in SPC_EnableLowPowerModeLowPowerIREF()
865 base->LP_CFG &= ~SPC_LP_CFG_LP_IREFEN_MASK; in SPC_EnableLowPowerModeLowPowerIREF()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mcx_spc/
Dfsl_spc.h1126 base->LP_CFG |= SPC_LP_CFG_LP_IREFEN_MASK; in SPC_EnableLowPowerModeLowPowerIREF()
1130 base->LP_CFG &= ~SPC_LP_CFG_LP_IREFEN_MASK; in SPC_EnableLowPowerModeLowPowerIREF()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h25601 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
25607 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h25601 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
25607 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h25601 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
25607 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h25601 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
25607 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h32851 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
32857 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h32851 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
32857 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h32851 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
32857 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h33473 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
33479 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h33473 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
33479 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h33473 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
33479 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h33482 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
33488 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h35651 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
35657 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h54736 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
54742 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h54694 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
54700 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h40495 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
40501 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
DMCXW727C_cm33_core1.h45685 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
45691 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h69050 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
69056 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
DMCXN546_cm33_core1.h69050 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
69056 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h69050 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
69056 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
DMCXN547_cm33_core1.h69050 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
69056 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h71716 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
71722 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h71716 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
71722 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)
DMCXN946_cm33_core1.h71716 #define SPC_LP_CFG_LP_IREFEN_MASK (0x800000U) macro
71722 … (((uint32_t)(((uint32_t)(x)) << SPC_LP_CFG_LP_IREFEN_SHIFT)) & SPC_LP_CFG_LP_IREFEN_MASK)

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