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Searched refs:SNVS_LPATCLKR_AT4_CLK_CTL_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h68640 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
68642 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
DMIMXRT1175_cm7.h67738 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
67740 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h67236 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
67238 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
DMIMXRT1165_cm4.h68138 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
68140 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h67738 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
67740 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h73601 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
73603 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
DMIMXRT1166_cm7.h72699 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
72701 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h74100 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
74102 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
DMIMXRT1173_cm7.h73198 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
73200 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h73201 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
73203 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h83868 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
83870 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)
DMIMXRT1176_cm4.h84770 #define SNVS_LPATCLKR_AT4_CLK_CTL_MASK (0x3000U) macro
84772 …(((uint32_t)(((uint32_t)(x)) << SNVS_LPATCLKR_AT4_CLK_CTL_SHIFT)) & SNVS_LPATCLKR_AT4_CLK_CTL_MASK)