Home
last modified time | relevance | path

Searched refs:SNVS_HPSVSR_WDOG2_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/snvs_hp/
Dfsl_snvs_hp.h54 #define SNVS_HPSVSR_SV2_MASK SNVS_HPSVSR_WDOG2_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h67432 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
67438 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
DMIMXRT1175_cm7.h66530 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
66536 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h66028 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
66034 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
DMIMXRT1165_cm4.h66930 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
66936 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h66530 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
66536 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h72393 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
72399 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
DMIMXRT1166_cm7.h71491 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
71497 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h72892 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
72898 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
DMIMXRT1173_cm7.h71990 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
71996 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h71993 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
71999 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h82660 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
82666 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)
DMIMXRT1176_cm4.h83562 #define SNVS_HPSVSR_WDOG2_MASK (0x4U) macro
83568 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPSVSR_WDOG2_SHIFT)) & SNVS_HPSVSR_WDOG2_MASK)