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Searched refs:SNVS_HPLR_AT4_SL_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h67018 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
67024 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
DMIMXRT1175_cm7.h66116 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
66122 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h65614 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
65620 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
DMIMXRT1165_cm4.h66516 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
66522 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h66116 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
66122 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h71979 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
71985 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
DMIMXRT1166_cm7.h71077 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
71083 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h72478 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
72484 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
DMIMXRT1173_cm7.h71576 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
71582 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h71579 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
71585 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h82246 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
82252 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)
DMIMXRT1176_cm4.h83148 #define SNVS_HPLR_AT4_SL_MASK (0x8000000U) macro
83154 … (((uint32_t)(((uint32_t)(x)) << SNVS_HPLR_AT4_SL_SHIFT)) & SNVS_HPLR_AT4_SL_MASK)