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Searched refs:SMPR (Results 1 – 25 of 35) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/include/
DQspi_Ip_HwAccess.h985 BaseAddr->SMPR = QuadSPI_SMPR_FSPHS(ClockPhase) in Qspi_Ip_SetRxCfg()
998 uint32 RegValue = BaseAddr->SMPR; in Qspi_Ip_SetRxDLLTapA()
1002 BaseAddr->SMPR = RegValue; in Qspi_Ip_SetRxDLLTapA()
1014 uint32 RegValue = BaseAddr->SMPR; in Qspi_Ip_SetRxDLLTapB()
1018 BaseAddr->SMPR = RegValue; in Qspi_Ip_SetRxDLLTapB()
/hal_nxp-latest/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h684 BaseAddr->SMPR = QuadSPI_SMPR_FSPHS(ClockPhase) in Qspi_Ip_SetRxCfg()
696 uint32 RegValue = BaseAddr->SMPR; in Qspi_Ip_SetRxDLLTapA()
700 BaseAddr->SMPR = RegValue; in Qspi_Ip_SetRxDLLTapA()
/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/
Dfsl_xspi.c563 base->SMPR = (((base->SMPR) & (~XSPI_SMPR_DLLFSMPFA_MASK)) | XSPI_SMPR_DLLFSMPFA(tapNum)); in XSPI_UpdateDllValue()
857 base->SMPR &= ~(XSPI_SMPR_FSPHS_MASK | XSPI_SMPR_FSDLY_MASK); in XSPI_SetDeviceConfig()
861 base->SMPR |= XSPI_SMPR_FSPHS_MASK; in XSPI_SetDeviceConfig()
866 base->SMPR |= XSPI_SMPR_FSDLY_MASK; in XSPI_SetDeviceConfig()
/hal_nxp-latest/mcux/mcux-sdk/boards/mimxrt700evk/project_template/
Dboard.c218 base->SMPR = (((base->SMPR) & (~XSPI_SMPR_DLLFSMPFA_MASK)) | in BOARD_InitXspi()
/hal_nxp-latest/s32/drivers/s32k3/Fls/src/
DQspi_Ip_Controller.c1978 BaseAddr->SMPR = (uint32)0x00000000UL; in Qspi_Ip_ResetAllRegisters()
2037 BaseAddr->SMPR = (uint32)0xFF000000UL; in Qspi_Ip_ResetAllRegisters()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_QUADSPI.h94 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_QUADSPI.h96 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/s32/drivers/s32ze/Mem_EXFLS/src/
DQspi_Ip_Controller.c2310 BaseAddr->SMPR = (uint32)0x00000000UL; in Qspi_Ip_ResetAllRegisters()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h103 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h18272 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h19245 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h30430 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
30478 #define QuadSPI_SMPR_REG(base) ((base)->SMPR)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h17776 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h17774 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h37628 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
37676 #define QuadSPI_SMPR_REG(base) ((base)->SMPR)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h27221 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h27222 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h63482 __IO uint32_t SMPR; /**< Sampling, offset: 0x108 */ member
DMIMXRT735S_cm33_core1.h63551 __IO uint32_t SMPR; /**< Sampling, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h44004 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h66774 __IO uint32_t SMPR; /**< Sampling, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h46177 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h46177 __IO uint32_t SMPR; /**< Sampling Register, offset: 0x108 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h66703 __IO uint32_t SMPR; /**< Sampling, offset: 0x108 */ member
DMIMXRT798S_cm33_core1.h66774 __IO uint32_t SMPR; /**< Sampling, offset: 0x108 */ member

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