Searched refs:SLEEPCON_RCFG (Results 1 – 3 of 3) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_power.h | 44 #define SLEEPCON_RCFG 0x0U macro
56 …kPDRUNCFG_SHUT_COMPT_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 0U), /*!< VDD2_COMP Domain Main Clock S…
59 MAKE_PD_BITS(SLEEPCON_RCFG, 1U), /*!< The Private Part in VDD1_SENSE Main Clock Shut Off. */
61 MAKE_PD_BITS(SLEEPCON_RCFG, 2U), /*!< The Shared Part in VDD1_SENSE Main Clock Shut Off. */
62 …kPDRUNCFG_SHUT_RAM0_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 3U), /*!< Main Clock of RAM Arbiter 0 S…
63 …kPDRUNCFG_SHUT_RAM1_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 4U), /*!< Main Clock of RAM Arbiter 1 s…
64 …kPDRUNCFG_SHUT_COMNN_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 5U), /*!< VDDN_COM Domain Main Clock Sh…
66 … MAKE_PD_BITS(SLEEPCON_RCFG, 6U), /*!< VDD2_MEDIA and VDDN_MEDIA Domains Main Clock of Shut Off. */
67 kPDRUNCFG_PD_SYSXTAL = MAKE_PD_BITS(SLEEPCON_RCFG, 7U), /*!< Xtal Oscillator Power Down. */
69 kPDRUNCFG_PD_FRO0 = MAKE_PD_BITS(SLEEPCON_RCFG, 8U), /*!< FRO0 Power Down. */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_power.h | 44 #define SLEEPCON_RCFG 0x0U macro
56 …kPDRUNCFG_SHUT_COMPT_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 0U), /*!< VDD2_COMP Domain Main Clock S…
59 MAKE_PD_BITS(SLEEPCON_RCFG, 1U), /*!< The Private Part in VDD1_SENSE Main Clock Shut Off. */
61 MAKE_PD_BITS(SLEEPCON_RCFG, 2U), /*!< The Shared Part in VDD1_SENSE Main Clock Shut Off. */
62 …kPDRUNCFG_SHUT_RAM0_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 3U), /*!< Main Clock of RAM Arbiter 0 S…
63 …kPDRUNCFG_SHUT_RAM1_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 4U), /*!< Main Clock of RAM Arbiter 1 s…
64 …kPDRUNCFG_SHUT_COMNN_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 5U), /*!< VDDN_COM Domain Main Clock Sh…
66 … MAKE_PD_BITS(SLEEPCON_RCFG, 6U), /*!< VDD2_MEDIA and VDDN_MEDIA Domains Main Clock of Shut Off. */
67 kPDRUNCFG_PD_SYSXTAL = MAKE_PD_BITS(SLEEPCON_RCFG, 7U), /*!< Xtal Oscillator Power Down. */
69 kPDRUNCFG_PD_FRO0 = MAKE_PD_BITS(SLEEPCON_RCFG, 8U), /*!< FRO0 Power Down. */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_power.h | 44 #define SLEEPCON_RCFG 0x0U macro
56 …kPDRUNCFG_SHUT_COMPT_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 0U), /*!< VDD2_COMP Domain Main Clock S…
59 MAKE_PD_BITS(SLEEPCON_RCFG, 1U), /*!< The Private Part in VDD1_SENSE Main Clock Shut Off. */
61 MAKE_PD_BITS(SLEEPCON_RCFG, 2U), /*!< The Shared Part in VDD1_SENSE Main Clock Shut Off. */
62 …kPDRUNCFG_SHUT_RAM0_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 3U), /*!< Main Clock of RAM Arbiter 0 S…
63 …kPDRUNCFG_SHUT_RAM1_CLK = MAKE_PD_BITS(SLEEPCON_RCFG, 4U), /*!< Main Clock of RAM Arbiter 1 s…
64 …kPDRUNCFG_SHUT_COMNN_MAINCLK = MAKE_PD_BITS(SLEEPCON_RCFG, 5U), /*!< VDDN_COM Domain Main Clock Sh…
66 … MAKE_PD_BITS(SLEEPCON_RCFG, 6U), /*!< VDD2_MEDIA and VDDN_MEDIA Domains Main Clock of Shut Off. */
67 kPDRUNCFG_PD_SYSXTAL = MAKE_PD_BITS(SLEEPCON_RCFG, 7U), /*!< Xtal Oscillator Power Down. */
69 kPDRUNCFG_PD_FRO0 = MAKE_PD_BITS(SLEEPCON_RCFG, 8U), /*!< FRO0 Power Down. */
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