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Searched refs:SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h50263 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
50269 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT735S_cm33_core1.h50323 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
50329 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT735S_ezhv.h74076 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
74082 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h53546 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
53552 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT758S_hifi1.h53484 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
53490 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT758S_ezhv.h77221 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
77227 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h53484 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
53490 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT798S_cm33_core1.h53546 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
53552 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)
DMIMXRT798S_ezhv.h77245 #define SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK (0x1U) macro
77251 …int32_t)(x)) << SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_SHIFT)) & SLEEPCON1_WAKEUPEN2_CLR_GPIO9_CH1_MASK)