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Searched refs:SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT735S/
Dfsl_pm_device.c278 …sc_RAM1CLK - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT758S/
Dfsl_pm_device.c278 …sc_RAM1CLK - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT798S/
Dfsl_pm_device.c278 …sc_RAM1CLK - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK},
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_power.c98 …SLEEPCON1_SLEEPCFG_RAM0_CLK_SHUTOFF_MASK | SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK | …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_power.c98 …SLEEPCON1_SLEEPCFG_RAM0_CLK_SHUTOFF_MASK | SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK | …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_power.c98 …SLEEPCON1_SLEEPCFG_RAM0_CLK_SHUTOFF_MASK | SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK | …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h48407 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
48413 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT735S_cm33_core1.h48467 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
48473 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT735S_ezhv.h72220 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
72226 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h51690 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
51696 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT758S_hifi1.h51628 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
51634 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT758S_ezhv.h75365 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
75371 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h51628 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
51634 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT798S_cm33_core1.h51690 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
51696 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)
DMIMXRT798S_ezhv.h75389 #define SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK (0x10U) macro
75395 …2_t)(x)) << SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_SLEEPCFG_RAM1_CLK_SHUTOFF_MASK)