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Searched refs:SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_power.c101SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | SLEEPCON1_SLEEPCFG_PLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_AUDPLLA…
1386 … SLEEPCON1_SLEEPCFG_AUDPLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_power.c101SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | SLEEPCON1_SLEEPCFG_PLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_AUDPLLA…
1386 … SLEEPCON1_SLEEPCFG_AUDPLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_power.c101SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | SLEEPCON1_SLEEPCFG_PLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_AUDPLLA…
1386 … SLEEPCON1_SLEEPCFG_AUDPLLLDO_PD_MASK | SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK | in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT735S/
Dfsl_pm_device.c284 [kResc_PLLANA - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT758S/
Dfsl_pm_device.c284 [kResc_PLLANA - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK},
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT798S/
Dfsl_pm_device.c284 [kResc_PLLANA - RESC_GROUP_PERIPHERALS_START] = {0U, SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK},
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h48455 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
48461 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT735S_cm33_core1.h48515 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
48521 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT735S_ezhv.h72268 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
72274 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h51738 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
51744 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT758S_hifi1.h51676 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
51682 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT758S_ezhv.h75413 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
75419 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h51676 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
51682 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT798S_cm33_core1.h51738 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
51744 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)
DMIMXRT798S_ezhv.h75437 #define SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK (0x1000U) macro
75443 …t32_t)(((uint32_t)(x)) << SLEEPCON1_SLEEPCFG_PLLANA_PD_SHIFT)) & SLEEPCON1_SLEEPCFG_PLLANA_PD_MASK)