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Searched refs:SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h48523 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
48529 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT735S_cm33_core1.h48583 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
48589 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT735S_ezhv.h72336 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
72342 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h51806 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
51812 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT758S_hifi1.h51744 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
51750 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT758S_ezhv.h75481 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
75487 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h51744 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
51750 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT798S_cm33_core1.h51806 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
51812 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)
DMIMXRT798S_ezhv.h75505 #define SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK (0x8U) macro
75511 …int32_t)(x)) << SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_SHIFT)) & SLEEPCON1_RUNCFG_RAM0_CLK_SHUTOFF_MASK)