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Searched refs:SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h72486 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
72492 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
DMIMXRT798S_cm33_core0.h72573 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
72579 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
DMIMXRT798S_ezhv.h72770 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
72776 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h69601 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
69607 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
DMIMXRT735S_cm33_core0.h69348 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
69354 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h72573 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
72579 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)
DMIMXRT758S_ezhv.h72746 #define SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK (0x4U) macro
72752 …int32_t)(x)) << SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_SHIFT)) & SLEEPCON0_WAKEUPEN3_CLR_GPIO3_CH1_MASK)