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Searched refs:SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h69811 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
69816 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_cm33_core0.h69898 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
69903 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_ezhv.h70095 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70100 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h66926 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
66931 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT735S_cm33_core0.h66673 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
66678 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h69898 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
69903 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT758S_ezhv.h70071 #define SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70076 …ET_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_SET_RAM1_CLK_SHUTOFF_SHIFT…