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Searched refs:SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h69967 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
69972 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_cm33_core0.h70054 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70059 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_ezhv.h70251 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70256 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h67082 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
67087 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT735S_cm33_core0.h66829 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
66834 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h70054 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70059 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…
DMIMXRT758S_ezhv.h70227 #define SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT (4U) macro
70232 …LR_RAM1_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM1_CLK_SHUTOFF_SHIFT…