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Searched refs:SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h69959 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
69964 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_cm33_core0.h70046 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
70051 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
DMIMXRT798S_ezhv.h70243 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
70248 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h67074 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
67079 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
DMIMXRT735S_cm33_core0.h66821 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
66826 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h70046 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
70051 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…
DMIMXRT758S_ezhv.h70219 #define SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT (3U) macro
70224 …LR_RAM0_CLK_SHUTOFF(x) (((uint32_t)(((uint32_t)(x)) << SLEEPCON0_RUNCFG_CLR_RAM0_CLK_SHUTOFF_SHIFT…