Searched refs:SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (Results 1 – 7 of 7) sorted by relevance
74302 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro74308 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
74389 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro74395 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
74586 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro74592 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
71417 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro71423 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
71164 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro71170 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
74562 #define SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK (0x40U) macro74568 … << SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_SHIFT)) & SLEEPCON0_PRIVATE_TSTAT1_GPIO4_LPACCEPT_MASK)
