Home
last modified time | relevance | path

Searched refs:SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h73690 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
73696 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
DMIMXRT798S_cm33_core0.h73777 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
73783 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
DMIMXRT798S_ezhv.h73974 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
73980 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h70805 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
70811 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
DMIMXRT735S_cm33_core0.h70552 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
70558 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h73777 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
73783 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)
DMIMXRT758S_ezhv.h73950 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK (0x8U) macro
73956 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO3_LPREQ_MASK)