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Searched refs:SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h73674 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
73680 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
DMIMXRT798S_cm33_core0.h73761 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
73767 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
DMIMXRT798S_ezhv.h73958 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
73964 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h70789 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
70795 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
DMIMXRT735S_cm33_core0.h70536 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
70542 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h73761 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
73767 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)
DMIMXRT758S_ezhv.h73934 #define SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK (0x2U) macro
73940 …t)(x)) << SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_SHIFT)) & SLEEPCON0_PRIVATE_TCTRL2_GPIO1_LPREQ_MASK)