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Searched refs:SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h74694 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
74700 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
DMIMXRT798S_cm33_core0.h74781 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
74787 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
DMIMXRT798S_ezhv.h74978 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
74984 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h71809 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
71815 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
DMIMXRT735S_cm33_core0.h71556 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
71562 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h74781 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
74787 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)
DMIMXRT758S_ezhv.h74954 #define SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK (0x10U) macro
74960 …(((uint32_t)(x)) << SLEEPCON0_LP_HINT1_GPIO4_LPHINT_SHIFT)) & SLEEPCON0_LP_HINT1_GPIO4_LPHINT_MASK)