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Searched refs:SINC_SR_CIP4_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h70367 #define SINC_SR_CIP4_MASK (0x10U) macro
70373 … (((uint32_t)(((uint32_t)(x)) << SINC_SR_CIP4_SHIFT)) & SINC_SR_CIP4_MASK)
DMCXN947_cm33_core0.h70367 #define SINC_SR_CIP4_MASK (0x10U) macro
70373 … (((uint32_t)(((uint32_t)(x)) << SINC_SR_CIP4_SHIFT)) & SINC_SR_CIP4_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h70367 #define SINC_SR_CIP4_MASK (0x10U) macro
70373 … (((uint32_t)(((uint32_t)(x)) << SINC_SR_CIP4_SHIFT)) & SINC_SR_CIP4_MASK)
DMCXN946_cm33_core1.h70367 #define SINC_SR_CIP4_MASK (0x10U) macro
70373 … (((uint32_t)(((uint32_t)(x)) << SINC_SR_CIP4_SHIFT)) & SINC_SR_CIP4_MASK)