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Searched refs:SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h109593 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8UD7_dsp0.h110315 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8UD7_cm33.h112169 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h112169 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8UD3_dsp0.h110315 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h110561 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8UD5_dsp0.h108728 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h108728 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8US5_cm33.h110561 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h110315 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro
DMIMX8US3_cm33.h112169 #define SIM_SEC_RTD_INTERRUPT_MASK0_POWERSYS(x) (((uint32_t)(((uint32_t)(x)) << SIM_SEC_RTD_INTERR… macro