Home
last modified time | relevance | path

Searched refs:SIM_SCGC7_DMA_MASK (Results 1 – 25 of 53) sorted by relevance

123

/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h7250 #define SIM_SCGC7_DMA_MASK (0x100U) macro
7256 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h8146 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8152 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h8144 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8150 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h3857 #define SIM_SCGC7_DMA_MASK (0x100U) macro
3859 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h8154 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8160 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h7266 #define SIM_SCGC7_DMA_MASK (0x100U) macro
7272 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h8800 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8806 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h8800 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8806 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h8741 #define SIM_SCGC7_DMA_MASK (0x2U) macro
8747 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h8858 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8864 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h8860 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8866 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h8774 #define SIM_SCGC7_DMA_MASK (0x2U) macro
8780 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h8694 #define SIM_SCGC7_DMA_MASK (0x100U) macro
8700 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h9557 #define SIM_SCGC7_DMA_MASK (0x2U) macro
9563 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h9737 #define SIM_SCGC7_DMA_MASK (0x100U) macro
9743 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h10231 #define SIM_SCGC7_DMA_MASK (0x2U) macro
10237 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h10525 #define SIM_SCGC7_DMA_MASK (0x100U) macro
10531 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h10628 #define SIM_SCGC7_DMA_MASK (0x2U) macro
10634 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h10995 #define SIM_SCGC7_DMA_MASK (0x2U) macro
11001 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h10813 #define SIM_SCGC7_DMA_MASK (0x2U) macro
10819 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h11927 #define SIM_SCGC7_DMA_MASK (0x100U) macro
11933 #define SIM_SCGC7_DMA(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h11927 #define SIM_SCGC7_DMA_MASK (0x100U) macro
11933 #define SIM_SCGC7_DMA(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h11927 #define SIM_SCGC7_DMA_MASK (0x100U) macro
11933 #define SIM_SCGC7_DMA(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h13576 #define SIM_SCGC7_DMA_MASK (0x100U) macro
13582 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h13576 #define SIM_SCGC7_DMA_MASK (0x100U) macro
13582 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC7_DMA_SHIFT)) & SIM_SCGC7_DMA_MASK)

123