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Searched refs:SIM_SCGC6_ADC0_MASK (Results 1 – 25 of 49) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h5856 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
5862 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h7232 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
7238 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h8126 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8132 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h8124 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8130 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h3846 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
3848 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h8134 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8140 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h7248 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
7254 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h8772 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8778 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h8772 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8778 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h8723 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8729 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h8830 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8836 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h8832 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8838 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h8756 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8762 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h8669 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
8675 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h9539 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
9545 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h9712 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
9718 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h10500 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
10506 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h10610 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
10616 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h10970 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
10976 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h10788 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
10794 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h11902 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
11908 …ine SIM_SCGC6_ADC0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h11902 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
11908 …ine SIM_SCGC6_ADC0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h11902 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
11908 …ine SIM_SCGC6_ADC0(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h13548 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
13554 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h13548 #define SIM_SCGC6_ADC0_MASK (0x8000000U) macro
13554 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC6_ADC0_SHIFT)) & SIM_SCGC6_ADC0_MASK)

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