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Searched refs:SIM_SCGC4_SPI1_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h7105 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
7111 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h7982 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
7988 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h7980 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
7986 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h3800 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
3802 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h7990 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
7996 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h7121 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
7127 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h8628 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
8634 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h8628 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
8634 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h8686 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
8692 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h8688 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
8694 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h9948 #define SIM_SCGC4_SPI1_MASK (0x400000U) macro
9954 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B21A/
DK32L2B21A.h11775 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
11781 …ine SIM_SCGC4_SPI1(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/
DK32L2B31A.h11775 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
11781 …ine SIM_SCGC4_SPI1(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B11A/
DK32L2B11A.h11775 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
11781 …ine SIM_SCGC4_SPI1(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h13396 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
13402 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h13396 #define SIM_SCGC4_SPI1_MASK (0x800000U) macro
13402 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h14653 #define SIM_SCGC4_SPI1_MASK (0x400000U) macro
14659 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h14649 #define SIM_SCGC4_SPI1_MASK (0x400000U) macro
14655 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h16196 #define SIM_SCGC4_SPI1_MASK (0x400000U) macro
16202 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h16312 #define SIM_SCGC4_SPI1_MASK (0x400000U) macro
16318 …ine SIM_SCGC4_SPI1(x) (((uint32_t)(((uint32_t)(x)) << SIM_SCGC4_SPI1_SHIFT)) & SIM_SCGC4_SPI1_MASK)