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Searched refs:SIM_ADCOPT_ADC0TRGSEL_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SIM.h208 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
211 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K118_SIM.h208 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
211 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K142W_SIM.h254 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
257 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K142_SIM.h244 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
247 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K144W_SIM.h254 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
257 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K144_SIM.h244 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
247 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K146_SIM.h254 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
257 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
DS32K148_SIM.h264 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
267 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h10477 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
10483 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h10479 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
10485 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h11316 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
11322 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h13067 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13073 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h13040 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13046 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h13073 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13079 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h13070 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13076 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h13280 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13286 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h13044 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13050 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h13283 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13289 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h13042 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
13048 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16487 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
16493 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17493 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
17499 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17487 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0x1U) macro
17493 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h23762 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0xF0000U) macro
23782 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h25528 #define SIM_ADCOPT_ADC0TRGSEL_MASK (0xF0000U) macro
25548 … (((uint32_t)(((uint32_t)(x)) << SIM_ADCOPT_ADC0TRGSEL_SHIFT)) & SIM_ADCOPT_ADC0TRGSEL_MASK)