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Searched refs:SEMC_SRAMCR4_COL_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/semc/
Dfsl_semc.c994 SEMC_SRAMCR4_COL_MASK; in SEMC_ConfigureSRAMWithChipSelection()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm4.h66127 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
66147 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1165_cm7.h65225 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
65245 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h65727 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
65747 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h66629 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
66649 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1175_cm7.h65727 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
65747 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm7.h71187 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
71207 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1173_cm4.h72089 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
72109 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm7.h70688 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
70708 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1166_cm4.h71590 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
71610 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h71190 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
71210 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h81857 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
81877 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1176_cm4.h82759 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
82779 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h75684 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
75704 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1187_cm7.h73658 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
73678 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm7.h77487 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
77507 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)
DMIMXRT1189_cm33.h79532 #define SEMC_SRAMCR4_COL_MASK (0xF000U) macro
79552 … (((uint32_t)(((uint32_t)(x)) << SEMC_SRAMCR4_COL_SHIFT)) & SEMC_SRAMCR4_COL_MASK)