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Searched refs:SEMA4_PROCESSOR_SELF (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/imx/drivers/
Dsema4.c52 *gate = SEMA4_GATE00_GTFSM(SEMA4_PROCESSOR_SELF + 1); in SEMA4_TryLock()
54 return ((*gate & SEMA4_GATE00_GTFSM_MASK) == SEMA4_GATE00_GTFSM(SEMA4_PROCESSOR_SELF + 1)) ? in SEMA4_TryLock()
76 *gate = SEMA4_GATE00_GTFSM(SEMA4_PROCESSOR_SELF + 1); in SEMA4_Lock()
77 } while ((*gate & SEMA4_GATE00_GTFSM_MASK) != SEMA4_GATE00_GTFSM(SEMA4_PROCESSOR_SELF + 1)); in SEMA4_Lock()
192 base->CPnINE[SEMA4_PROCESSOR_SELF].INE |= intMask; in SEMA4_SetIntCmd()
194 base->CPnINE[SEMA4_PROCESSOR_SELF].INE &= ~intMask; in SEMA4_SetIntCmd()
Dsema4.h240 return base->CPnNTF[SEMA4_PROCESSOR_SELF].NTF & flags; in SEMA4_GetStatusFlag()
264 return base->CPnINE[SEMA4_PROCESSOR_SELF].INE & flags; in SEMA4_GetIntEnabled()
/hal_nxp-latest/imx/devices/
Ddevice_imx.h56 #define SEMA4_PROCESSOR_SELF (1) macro
64 #define SEMA4_PROCESSOR_SELF (1) macro