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Searched refs:SDMAARM_INTRMASK_HIMASK_MASK (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h46640 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46642 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h46638 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46640 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h46638 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46640 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h46640 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46642 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h46640 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46642 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h46638 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46640 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
DMIMX8MN6_ca53.h46652 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
46654 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h48008 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
48010 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h50181 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
50183 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h50181 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
50183 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h32192 #define SDMAARM_INTRMASK_HIMASK_MASK 0xFFFFFFFFu macro
32194 … (((uint32_t)(((uint32_t)(x))<<SDMAARM_INTRMASK_HIMASK_SHIFT))&SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h50181 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
50183 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h50181 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
50183 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h39375 #define SDMAARM_INTRMASK_HIMASK_MASK 0xFFFFFFFFu macro
39377 … (((uint32_t)(((uint32_t)(x))<<SDMAARM_INTRMASK_HIMASK_SHIFT))&SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
DMIMX8MM6_ca53.h64600 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
64602 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h65135 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
65137 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h91722 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
91724 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h91722 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
91724 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h91722 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
91724 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h87707 #define SDMAARM_INTRMASK_HIMASK_MASK (0xFFFFFFFFU) macro
87709 … (((uint32_t)(((uint32_t)(x)) << SDMAARM_INTRMASK_HIMASK_SHIFT)) & SDMAARM_INTRMASK_HIMASK_MASK)

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