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Searched refs:SDIF_STATUS_FIFO_EMPTY_MASK (Results 1 – 23 of 23) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h10600 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
10604 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h10415 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
10419 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h9623 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
9627 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h9956 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
9960 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h14104 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14108 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h13104 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
13107 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h14179 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14183 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h14516 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14520 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h14822 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14826 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h14824 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14828 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h15308 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
15312 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h14516 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14520 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h13810 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
13813 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h14747 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
14751 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h15308 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
15312 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h17888 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
17892 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h17887 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
17891 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h19544 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
19548 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h19543 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
19547 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h20142 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
20146 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
DLPC55S66_cm33_core0.h20142 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
20146 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h20141 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
20145 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)
DLPC55S69_cm33_core0.h20141 #define SDIF_STATUS_FIFO_EMPTY_MASK (0x4U) macro
20145 … (((uint32_t)(((uint32_t)(x)) << SDIF_STATUS_FIFO_EMPTY_SHIFT)) & SDIF_STATUS_FIFO_EMPTY_MASK)