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Searched refs:SC_PM_CLK_PER (Results 1 – 25 of 32) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.c77 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExtMapped()
117 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClockMapped()
143 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
167 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
188 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
190 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_1_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/drivers/
Dfsl_clock.c63 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, true, (bool)gate); in CLOCK_EnableClockExt()
91 err = sc_pm_clock_enable(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, false, false); in CLOCK_DisableClock()
117 err = sc_pm_set_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &target); in CLOCK_SetIpFreq()
141 err = sc_pm_get_clock_rate(ipcHandle, LPCG_TUPLE_RSRC(name), SC_PM_CLK_PER, &freq); in CLOCK_GetIpFreq()
162 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_PER, &freq); in CLOCK_GetCoreSysClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/boards/mekmimx8qm/
Dboard.c411 err = sc_pm_set_clock_rate(ipc, SC_R_MIPI_0_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display0_I2C_Init()
444 err = sc_pm_set_clock_rate(ipc, SC_R_MIPI_1_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display1_I2C_Init()
477 err = sc_pm_set_clock_rate(ipc, SC_R_LVDS_0_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display2_I2C_Init()
523 err = sc_pm_set_clock_rate(ipc, SC_R_LVDS_1_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display4_I2C_Init()
653 err = sc_pm_set_clock_rate(ipc, BOARD_CAMERA0_I2C_RSRC, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Camera0_I2C_Init()
701 err = sc_pm_set_clock_rate(ipc, BOARD_CAMERA1_I2C_RSRC, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Camera1_I2C_Init()
/hal_nxp-latest/mcux/mcux-sdk/boards/mekmimx8qx/
Dboard.c479 err = sc_pm_set_clock_rate(ipc, SC_R_MIPI_0_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display0_I2C_Init()
500 err = sc_pm_set_clock_rate(ipc, SC_R_MIPI_1_I2C_0, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Display1_I2C_Init()
577 err = sc_pm_set_clock_rate(ipc, BOARD_CAMERA0_I2C_RSRC, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Camera0_I2C_Init()
611 err = sc_pm_set_clock_rate(ipc, BOARD_CAMERA1_I2C_RSRC, SC_PM_CLK_PER, &lpi2cClkFreq_Hz); in BOARD_Camera1_I2C_Init()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/scfw_api/svc/pm/
Dpm_api.h96 #define SC_PM_CLK_PER 2U /*!< Peripheral clock */ macro

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