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Searched refs:SC_PM_CLK_CPU (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
Dsystem_MIMX8DX3_cm4.c136 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
Dsystem_MIMX8QX1_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
Dsystem_MIMX8DX2_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
Dsystem_MIMX8DX6_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
Dsystem_MIMX8QX5_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
Dsystem_MIMX8QM6_cm4_core0.c135 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
Dsystem_MIMX8QM6_cm4_core1.c134 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_1_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
Dsystem_MIMX8QX4_cm4.c136 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
Dsystem_MIMX8QX6_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
Dsystem_MIMX8QX2_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
Dsystem_MIMX8DX5_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
Dsystem_MIMX8DX4_cm4.c136 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
Dsystem_MIMX8UX5_cm4.c139 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
Dsystem_MIMX8UX6_cm4.c139 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
Dsystem_MIMX8QX3_cm4.c136 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
Dsystem_MIMX8DX1_cm4.c138 err = sc_pm_get_clock_rate(ipcHandle, SC_R_M4_0_PID0, SC_PM_CLK_CPU, &freq); in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/scfw_api/svc/pm/
Dpm_api.h104 #define SC_PM_CLK_CPU 2U /*!< CPU clock */ macro

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