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Searched refs:SCG_VCCR_SCS_MASK (Results 1 – 25 of 30) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SCG.h206 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
209 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K118_SCG.h206 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
209 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K142W_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K142_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K146_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K144_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K148_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
DS32K144W_SCG.h210 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
213 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Selector.c538 RegValue &= ~SCG_VCCR_SCS_MASK; in Clock_Ip_SetScgVlprSel_TrustedCall()
DClock_Ip_Specific.c725 …igurations[SelectorConfigIndex].Value = ClockSource[(IP_SCG->VCCR & SCG_VCCR_SCS_MASK) >> SCG_VCCR… in getSelectorConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h9838 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
9850 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h9840 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
9852 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h10677 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
10689 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12367 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12379 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h12271 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12283 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12373 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12385 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12370 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12382 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h12618 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12630 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h12275 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12287 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h12621 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12633 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h12273 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
12285 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h15612 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
15624 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h14596 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
14608 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h14596 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
14608 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h16618 #define SCG_VCCR_SCS_MASK (0xF000000U) macro
16630 … (((uint32_t)(((uint32_t)(x)) << SCG_VCCR_SCS_SHIFT)) & SCG_VCCR_SCS_MASK)

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