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Searched refs:SCG_SPLLCSR_SPLLERR_MASK (Results 1 – 25 of 37) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h1870 return ((SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK) == SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1878 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1473 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h1870 return ((SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK) == SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1878 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1473 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142W_SCG.h439 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
442 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
DS32K142_SCG.h463 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
466 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
DS32K146_SCG.h463 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
466 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
DS32K144_SCG.h463 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
466 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
DS32K148_SCG.h463 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
466 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
DS32K144W_SCG.h439 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
442 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h1302 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1310 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1083 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h1302 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1310 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1083 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h1296 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1304 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1083 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h1366 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1374 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1123 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h1366 return (bool)(SCG->SPLLCSR & SCG_SPLLCSR_SPLLERR_MASK); in CLOCK_IsSysPllErr()
1374 SCG->SPLLCSR |= SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_ClearSysPllErr()
Dfsl_clock.c1123 SCG->SPLLCSR = SCG_SPLLCSR_SPLLERR_MASK; in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16206 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
16213 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h15228 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
15235 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h15228 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
15235 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17212 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
17219 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17206 #define SCG_SPLLCSR_SPLLERR_MASK (0x4000000U) macro
17213 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLERR_SHIFT)) & SCG_SPLLCSR_SPLLERR_MASK)

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