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Searched refs:SCG_ROSCCSR_ROSCVLD_MASK (Results 1 – 25 of 46) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/
Dfsl_clock.c645 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
691 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
692 SCG_ROSCCSR_ROSCVLD_MASK) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
Dfsl_clock.h1256 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/
Dfsl_clock.c644 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
690 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
691 SCG_ROSCCSR_ROSCVLD_MASK) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
Dfsl_clock.h1194 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/
Dfsl_clock.c644 while ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) != SCG_ROSCCSR_ROSCVLD_MASK) in CLOCK_InitRosc()
690 if ((CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK) == in CLOCK_GetRtcOscFreq()
691 SCG_ROSCCSR_ROSCVLD_MASK) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
Dfsl_clock.h1194 return (bool)(CLOCK_REG(&SCG0->ROSCCSR) & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRoscValid()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h1537 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
Dfsl_clock.c1052 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h1537 return ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
Dfsl_clock.c1052 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.c677 if ((SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) /* RTC OSC clock is valid. */ in CLOCK_GetRtcOscFreq()
Dfsl_clock.h1259 return (bool)(SCG->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK); in CLOCK_IsRtcOscValid()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.c342 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
1916 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.c342 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
1916 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.c358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.c358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.c358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.c358 while ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) == 0U) in CLOCK_SetupOsc32KClocking()
2330 return ((SCG0->ROSCCSR & SCG_ROSCCSR_ROSCVLD_MASK) != 0UL) ? in CLOCK_GetOsc32KFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h17969 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
17975 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
DK32L3A60_cm0plus.h18079 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
18085 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h25167 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
25173 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h25167 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
25173 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h25167 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
25173 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h25167 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
25173 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h32461 #define SCG_ROSCCSR_ROSCVLD_MASK (0x1000000U) macro
32467 … (((uint32_t)(((uint32_t)(x)) << SCG_ROSCCSR_ROSCVLD_SHIFT)) & SCG_ROSCCSR_ROSCVLD_MASK)

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