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Searched refs:SCG_LPFLLDIV_LPFLLDIV1 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.c718 SCG->LPFLLDIV = SCG_LPFLLDIV_LPFLLDIV1(config->div1) | SCG_LPFLLDIV_LPFLLDIV2(config->div2) | in CLOCK_InitLpFll()
Dfsl_clock.h1314 reg = (reg & ~SCG_LPFLLDIV_LPFLLDIV1_MASK) | SCG_LPFLLDIV_LPFLLDIV1(divider); in CLOCK_SetLpFllAsyncClkDiv()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h18101 #define SCG_LPFLLDIV_LPFLLDIV1(x) (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLDIV_LPFLL… macro
DK32L3A60_cm0plus.h18211 #define SCG_LPFLLDIV_LPFLLDIV1(x) (((uint32_t)(((uint32_t)(x)) << SCG_LPFLLDIV_LPFLL… macro