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Searched refs:SCG_HCCR_DIVBUS_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142_SCG.h224 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
227 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
DS32K146_SCG.h224 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
227 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
DS32K144_SCG.h224 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
227 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
DS32K148_SCG.h224 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
227 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Divider.c589 RegValue &= ~SCG_HCCR_DIVBUS_MASK; in Clock_Ip_SetScgHsrunDivbus_TrustedCall()
DClock_Ip_Specific.c859 …ividerConfigurations[DividerConfigIndex].Value = ((IP_SCG->HCCR & SCG_HCCR_DIVBUS_MASK) >> SCG_HCC… in getBusDividerConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h15652 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
15672 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h16658 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
16678 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h16652 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
16672 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h17560 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
17580 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
DK32L3A60_cm0plus.h17670 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
17690 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h28651 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
28671 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h28652 #define SCG_HCCR_DIVBUS_MASK (0xF0U) macro
28672 … (((uint32_t)(((uint32_t)(x)) << SCG_HCCR_DIVBUS_SHIFT)) & SCG_HCCR_DIVBUS_MASK)