| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/ |
| D | fsl_clock.c | 557 while ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) != SCG_FIRCCSR_FIRCVLD_MASK) in CLOCK_InitFirc() 605 …if ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) == SCG_FIRCCSR_FIRCVLD_MASK) /* FIRC is… in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/ |
| D | fsl_clock.c | 556 while ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) != SCG_FIRCCSR_FIRCVLD_MASK) in CLOCK_InitFirc() 604 …if ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) == SCG_FIRCCSR_FIRCVLD_MASK) /* FIRC is… in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/ |
| D | fsl_clock.c | 556 while ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) != SCG_FIRCCSR_FIRCVLD_MASK) in CLOCK_InitFirc() 604 …if ((CLOCK_REG(&SCG0->FIRCCSR) & SCG_FIRCCSR_FIRCVLD_MASK) == SCG_FIRCCSR_FIRCVLD_MASK) /* FIRC is… in CLOCK_GetFircFreq()
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| /hal_nxp-latest/s32/drivers/s32k1/Mcu/src/ |
| D | Clock_Ip_IntOsc.c | 659 … IrcoscStatus = (((IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT)); in Clock_Ip_SetFirc_TrustedCall() 699 … IrcoscStatus = (((IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT)); in Clock_Ip_SetFirc_TrustedCall() 729 … IrcoscStatus = (((IP_SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) >> SCG_FIRCCSR_FIRCVLD_SHIFT)); in Clock_Ip_EnableFirc_TrustedCall()
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K116_SCG.h | 368 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 371 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K118_SCG.h | 368 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 371 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K142W_SCG.h | 372 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 375 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K142_SCG.h | 396 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K146_SCG.h | 396 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K144_SCG.h | 396 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K148_SCG.h | 396 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| D | S32K144W_SCG.h | 372 #define SCG_FIRCCSR_FIRCVLD_MASK (0x1000000U) macro 375 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCSR_FIRCVLD_SHIFT)) & SCG_FIRCCSR_FIRCVLD_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/ |
| D | fsl_clock.c | 650 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 704 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/ |
| D | fsl_clock.c | 567 while (0U == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 620 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/ |
| D | fsl_clock.c | 630 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 684 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/ |
| D | fsl_clock.c | 646 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 700 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/ |
| D | fsl_clock.c | 650 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 704 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/ |
| D | fsl_clock.c | 646 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 700 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/ |
| D | fsl_clock.c | 650 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 704 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/ |
| D | fsl_clock.c | 630 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 684 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/ |
| D | fsl_clock.c | 630 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 684 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/ |
| D | fsl_clock.c | 649 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 706 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/ |
| D | fsl_clock.c | 695 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 752 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/drivers/ |
| D | fsl_clock.c | 695 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 752 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/ |
| D | fsl_clock.c | 761 while (0UL == (SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK)) in CLOCK_InitFirc() 818 if ((SCG->FIRCCSR & SCG_FIRCCSR_FIRCVLD_MASK) != 0UL) /* FIRC is valid. */ in CLOCK_GetFircFreq()
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