| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/ |
| D | system_MCIMX7U3_cm4.c | 180 …SCGOUTClock = 48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * … in SystemCoreClockUpdate() 190 … (48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000u); in SystemCoreClockUpdate() 225 … (48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000u); in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/ |
| D | system_MCIMX7U5_cm4.c | 181 …SCGOUTClock = 48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * … in SystemCoreClockUpdate() 191 … (48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000u); in SystemCoreClockUpdate() 226 … (48000000u + ((SCG0->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000u); in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/ |
| D | system_K32L2A31A.c | 103 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate() 110 … 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000U; in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/ |
| D | system_K32L2A41A.c | 103 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate() 110 … 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000U; in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/ |
| D | system_MKE18F16.c | 127 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate() 132 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/ |
| D | system_MKE16F16.c | 127 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate() 132 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/ |
| D | system_MKE14F16.c | 127 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate() 132 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K116_SCG.h | 396 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K118_SCG.h | 396 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 399 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K142W_SCG.h | 400 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 403 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K142_SCG.h | 424 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 427 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K146_SCG.h | 424 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 427 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K144_SCG.h | 424 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 427 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K148_SCG.h | 424 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 427 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| D | S32K144W_SCG.h | 400 #define SCG_FIRCCFG_RANGE_MASK (0x3U) macro 403 … (((uint32_t)(((uint32_t)(x)) << SCG_FIRCCFG_RANGE_SHIFT)) & SCG_FIRCCFG_RANGE_MASK)
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/ |
| D | system_MKE13Z7.c | 111 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/ |
| D | system_MKE15Z7.c | 118 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/ |
| D | system_MKE17Z9.c | 103 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/ |
| D | system_MKE17Z7.c | 111 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/ |
| D | system_MKE12Z9.c | 103 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/ |
| D | system_MKE15Z4.c | 111 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/ |
| D | system_MKE12Z7.c | 111 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/ |
| D | system_MKE16Z4.c | 109 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/ |
| D | system_MKE14Z4.c | 111 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/ |
| D | system_MKE13Z9.c | 103 …SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4… in SystemCoreClockUpdate()
|