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Searched refs:SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.c2137 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2516 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.c2137 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2516 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.c2564 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2943 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.c2564 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2943 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.c2564 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2943 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.c2564 if ((SCG0->APLLCTRL & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPll0PostDiv()
2943 if ((pSetup->pllctrl & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK) != 0UL) in findPllPostDivFromSetup()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h53203 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
53209 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h53161 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
53167 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h64762 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
64768 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
DMCXN546_cm33_core1.h64762 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
64768 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h64762 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
64768 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
DMCXN547_cm33_core1.h64762 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
64768 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h65509 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
65515 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
DMCXN947_cm33_core0.h65509 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
65515 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h65509 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
65515 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)
DMCXN946_cm33_core1.h65509 #define SCG_APLLCTRL_BYPASSPOSTDIV2_MASK (0x10000U) macro
65515 …int32_t)(((uint32_t)(x)) << SCG_APLLCTRL_BYPASSPOSTDIV2_SHIFT)) & SCG_APLLCTRL_BYPASSPOSTDIV2_MASK)