Home
last modified time | relevance | path

Searched refs:SCG_APLLCSR_LK_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.c1165 else if ((reg & SCG_APLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitAuxPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.c1165 else if ((reg & SCG_APLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitAuxPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h29548 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
29554 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h29549 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
29555 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h53144 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
53150 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h53102 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
53108 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h64703 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
64709 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
DMCXN546_cm33_core1.h64703 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
64709 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h64703 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
64709 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
DMCXN547_cm33_core1.h64703 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
64709 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h65450 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
65456 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
DMCXN947_cm33_core0.h65450 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
65456 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h65450 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
65456 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)
DMCXN946_cm33_core1.h65450 #define SCG_APLLCSR_LK_MASK (0x800000U) macro
65456 … (((uint32_t)(((uint32_t)(x)) << SCG_APLLCSR_LK_SHIFT)) & SCG_APLLCSR_LK_MASK)