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Searched refs:SCB_CFSR_UNALIGNED_Msk (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/exception_handling/cm7/
Dfsl_component_exception_handling.c265 if (0U != (cfsr & SCB_CFSR_UNALIGNED_Msk)) /* SCB CFSR (UFSR): UNALIGNED Mask */ in EXCEPTION_ConfigurableFaultStatusRegisterPrint()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Include/
Dcore_sc300.h599 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm3.h602 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm4.h666 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_armv8mml.h786 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm35p.h786 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm7.h719 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm33.h786 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_armv81mml.h795 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm4.h671 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm7.h725 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro
Dcore_cm33.h794 #define SCB_CFSR_UNALIGNED_Msk (1UL << SCB_CFSR_UNALIGNED_Pos) /*!< SCB … macro