Home
last modified time | relevance | path

Searched refs:S2 (Results 1 – 25 of 96) sorted by relevance

1234

/hal_nxp-latest/mcux/mcux-sdk/drivers/i2c/
Dfsl_i2c.c618 s2Reg = (uint8_t)(base->S2 & (~I2C_S2_DFEN_MASK)); in I2C_MasterInit()
619 base->S2 = s2Reg | I2C_S2_DFEN(masterConfig->enableDoubleBuffering); in I2C_MasterInit()
849 while ((0U == (base->S2 & I2C_S2_EMPTY_MASK)) && (0U != waitTimes)) in I2C_MasterStart()
858 while (0U == (base->S2 & I2C_S2_EMPTY_MASK)) in I2C_MasterStart()
911 while ((0U == (base->S2 & I2C_S2_EMPTY_MASK)) && (0U != waitTimes)) in I2C_MasterRepeatedStart()
920 while (0U == (base->S2 & I2C_S2_EMPTY_MASK)) in I2C_MasterRepeatedStart()
1766 tmpReg = (uint8_t)(base->S2 & (~I2C_S2_DFEN_MASK)); in I2C_SlaveInit()
1767 base->S2 = tmpReg | I2C_S2_DFEN(slaveConfig->enableDoubleBuffering); in I2C_SlaveInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
878 if (!(MCG->S2 & MCG_S2_LOCK1_MASK)) in CLOCK_GetPll1Freq()
1253 while (!(MCG->S2 & MCG_S2_LOCK1_MASK)) in CLOCK_EnablePll1()
1321 MCG->S2 = MCG_S2_LOCS2_MASK; in CLOCK_SetOsc1MonitorMode()
1427 MCG->S2 = MCG_S2_LOLS1_MASK; in CLOCK_SetPll1MonitorMode()
1504 uint8_t mcg_s2 = MCG->S2; in CLOCK_GetStatusFlags()
1593 MCG->S2 = MCG_S2_LOCS2_MASK; in CLOCK_ClearStatusFlags()
1612 MCG->S2 = MCG_S2_LOLS1_MASK; in CLOCK_ClearStatusFlags()
1691 while (!(MCG->S2 & MCG_S2_OSCINIT1_MASK)) in CLOCK_InitOsc1()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
878 if (!(MCG->S2 & MCG_S2_LOCK1_MASK)) in CLOCK_GetPll1Freq()
1253 while (!(MCG->S2 & MCG_S2_LOCK1_MASK)) in CLOCK_EnablePll1()
1321 MCG->S2 = MCG_S2_LOCS2_MASK; in CLOCK_SetOsc1MonitorMode()
1427 MCG->S2 = MCG_S2_LOLS1_MASK; in CLOCK_SetPll1MonitorMode()
1504 uint8_t mcg_s2 = MCG->S2; in CLOCK_GetStatusFlags()
1593 MCG->S2 = MCG_S2_LOCS2_MASK; in CLOCK_ClearStatusFlags()
1612 MCG->S2 = MCG_S2_LOLS1_MASK; in CLOCK_ClearStatusFlags()
1691 while (!(MCG->S2 & MCG_S2_OSCINIT1_MASK)) in CLOCK_InitOsc1()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpsci/
Dfsl_lpsci.c464 status_flag = base->S1 | ((uint32_t)(base->S2) << 8); in LPSCI_GetStatusFlags()
482 base->S2 = UART0_S2_LBKDIF_MASK; in LPSCI_ClearStatusFlags()
489 base->S2 = UART0_S2_RXEDGIF_MASK; in LPSCI_ClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/uart/
Dfsl_uart.c666 status_flag |= ((uint32_t)(base->S2) << 8); in UART_GetStatusFlags()
698 uint8_t reg = base->S2; in UART_ClearStatusFlags()
707 base->S2 = reg | (uint8_t)(mask >> 8); in UART_ClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.c103 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P…

1234