Searched refs:Reserved (Results 1 – 22 of 22) sorted by relevance
| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/host/class/ |
| D | usb_host_cdc_rndis.c | 159 message->Reserved = 0U; in USB_HostRndisResetMsg()
|
| D | usb_host_cdc_rndis.h | 217 uint32_t Reserved; member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/gcc/ |
| D | MIMX8QM6xxxFF_cm4_core1_flash.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| D | MIMX8QM6xxxFF_cm4_core1_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| D | MIMX8QM6xxxFF_cm4_core0_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| D | MIMX8QM6xxxFF_cm4_core0_flash.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/gcc/ |
| D | MIMX8QX6xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/gcc/ |
| D | MIMX8QX3xxxxx_cm4_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/gcc/ |
| D | MIMX8QX2xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/gcc/ |
| D | MIMX8QX5xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/gcc/ |
| D | MIMX8QX1xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/gcc/ |
| D | MIMX8DX6xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/gcc/ |
| D | MIMX8DX4xxxxx_cm4_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/gcc/ |
| D | MIMX8DX2xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/gcc/ |
| D | MIMX8DX3xxxxx_cm4_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/gcc/ |
| D | MIMX8QX4xxxxx_cm4_ddr_ram.ld | 30 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/gcc/ |
| D | MIMX8DX5xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/gcc/ |
| D | MIMX8UX5xxxxx_cm4_ddr_ram.ld | 33 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/gcc/ |
| D | MIMX8UX6xxxxx_cm4_ddr_ram.ld | 33 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/gcc/ |
| D | MIMX8DX1xxxxx_cm4_ddr_ram.ld | 32 /* Reserved for PFU fetches, which is six 16-bit Thumb instructions */
|
| /hal_nxp-latest/mcux/middleware/wifi_nxp/wifidriver/incl/ |
| D | mlan_ieee.h | 2213 t_u8 Reserved : 4;
|
| /hal_nxp-latest/mcux/middleware/wifi_nxp/wifidriver/ |
| D | mlan_glue.c | 7017 uint8_t Reserved[2];
|