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Searched refs:RTC_CTRL_RTC_SUBSEC_ENA_MASK (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_rtc/
Dfsl_rtc.h209 base->CTRL |= RTC_CTRL_RTC_SUBSEC_ENA_MASK; in RTC_EnableSubsecCounter()
213 base->CTRL &= ~RTC_CTRL_RTC_SUBSEC_ENA_MASK; in RTC_EnableSubsecCounter()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h17759 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17770 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h17642 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17653 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h17642 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17653 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h17759 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17770 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h17759 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17770 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h17642 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17653 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h15323 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
15334 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h20027 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
20038 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h20027 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
20038 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h15322 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
15333 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h18487 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
18498 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h16979 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
16990 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h16978 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
16989 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h18488 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
18499 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h20757 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
20768 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h20756 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
20767 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h18489 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
18500 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h17577 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17588 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
DLPC55S66_cm33_core0.h17577 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17588 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h17576 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17587 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
DLPC55S69_cm33_core0.h17576 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
17587 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h19760 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
19771 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
DMIMXRT685S_cm33.h27614 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
27625 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h27614 #define RTC_CTRL_RTC_SUBSEC_ENA_MASK (0x400U) macro
27625 … (((uint32_t)(((uint32_t)(x)) << RTC_CTRL_RTC_SUBSEC_ENA_SHIFT)) & RTC_CTRL_RTC_SUBSEC_ENA_MASK)

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