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Searched refs:RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h41840 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
41846 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT735S_cm33_core1.h41900 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
41906 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT735S_ezhv.h60151 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
60157 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT735S_cm33_core0.h59715 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
59721 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h45123 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
45129 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT758S_hifi1.h45061 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
45067 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT758S_cm33_core0.h62940 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
62946 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT758S_ezhv.h63296 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
63302 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h45061 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
45067 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT798S_cm33_core1.h45123 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
45129 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT798S_hifi4.h62855 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
62861 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT798S_cm33_core0.h62940 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
62946 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)
DMIMXRT798S_ezhv.h63320 #define RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK (0x100U) macro
63326 …(uint32_t)(((uint32_t)(x)) << RSTCTL3_PRSTCTL1_CLR_ACMP0_SHIFT)) & RSTCTL3_PRSTCTL1_CLR_ACMP0_MASK)