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Searched refs:RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h41087 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
41093 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT735S_cm33_core1.h41147 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
41153 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT735S_ezhv.h59436 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
59442 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h44370 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
44376 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT758S_hifi1.h44308 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
44314 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT758S_ezhv.h62581 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
62587 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h44308 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
44314 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT798S_cm33_core1.h44370 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
44376 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)
DMIMXRT798S_ezhv.h62605 #define RSTCTL1_PRSTCTL0_CLR_SAI3_MASK (0x400U) macro
62611 …(((uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_SAI3_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_SAI3_MASK)