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Searched refs:RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h41135 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
41141 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT735S_cm33_core1.h41195 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
41201 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT735S_ezhv.h59484 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
59490 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h44418 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
44424 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT758S_hifi1.h44356 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
44362 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT758S_ezhv.h62629 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
62635 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h44356 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
44362 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT798S_cm33_core1.h44418 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
44424 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)
DMIMXRT798S_ezhv.h62653 #define RSTCTL1_PRSTCTL0_CLR_PINT1_MASK (0x10000U) macro
62659 …(uint32_t)(((uint32_t)(x)) << RSTCTL1_PRSTCTL0_CLR_PINT1_SHIFT)) & RSTCTL1_PRSTCTL0_CLR_PINT1_MASK)